Re: gEDA-user: [pcb] "first board" docs

[Bert Timmerman <bert.timmerman@xxxxxxxxx>]

Hi DJ,

I just looked at the pdf to see how things would look if printed out.

At page 14 (# at upper right corner) of the pdf, the graphics are in the
wrong order wrt the the html version.

Hmm, one other remark, the pdf starts with page #1 (front matter),
followed by page #i for the index and then page #1 again for the
introduction chapter.

So basically page numbers after the index are offset by 2 ;-(

Kind regards,

Bert Timmerman.



On Thu, 2007-12-27 at 01:47 -0500, DJ Delorie wrote:
> > Your tutorial looks very good indeed.
> 
> Thanks!
> 
> > FWIW, the boards I layout contain a bit more parts/footprints.
> 
> There are two more boards scheduled, with more parts each.  This one
> was to get the user used to "draw line, move part" type operations.
> 
> > When routing these w/o netlist (and thus w/o ratlines) I name the parts
> > with their refdes first and then route the necessary traces.
> 
> I can change that.  I think with three parts it doesn't matter, though ;-)
> 
> > When the number of pins on a part is large or the numbering scheme is
> > confusing (example: DSUB connector), I use the pinout window.
> 
> I'll think about that for the second project, which includes an IC.
> 
> > Furthermore when I'm just a little bit certain a named part is in the
> > *right* position I lock it.
> 
> I don't usually lock parts, unless they're coming from a template.
> I.e. I have a template for the connectors for my USB board, so when I
> start a new board I just copy it.  Those connectors are locked because
> they have to match the old board.
> 
> What I often do (when using netlists) is shut off the silk layer.
> That stops me from moving all elements, and gets the silk out of my
> way.
> 
> Besides, if it's not *needed* for the simple board, I'd rather defer
> it to a later project.
> 
> 
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