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Re: gEDA-user: Erroneous rats added to PCB
On Thu, 2010-12-16 at 23:06 -0500, Peter Laurich wrote:
> Hi Peter and DJ,
>
> Sorry for being off-line for a while.
>
> Thanks very much for sorting this one out. I was going to fire up the
> debugger tomorrow to see if I could figure it out. Now I can go back
> to my layout task.
>
> Cheers,
No problem!
It is lucky (for us) that you spotted it so soon after the bug was
introduced.
It was a nasty unobvious sort of bug, and to be honest, I'm still not
100% sure what expected API rules of calling the affected function are.
It appears that it is doing some clean-up for an operation it does not
directly initiate. (For something done before the function was called).
The patch in question had the side-effect of causing the function to
exit early when no work was to be done (where the function did not have
to add any rats to process). It seems that the clean-up it skipped by
doing so was actually necessary to flush out connections from the
current net, before moving onto the next net in the netlist.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
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