gEDA-user: overlapping via changes

[DJ Delorie <dj@xxxxxxxxxxx>]

I changed the "overlapping vias" test in two ways...

1. Via copper is now allowed to overlap when vias are created.  Via
   *drills* are not.

2. Vias which violate this rule in a *.pcb file are preserved at load
   time.

Thus, PCB will make a modest attempt at preventing users from making
vias that might be difficult to manufacture, but if the user finds a
way around the restriction, PCB will let them get away with it.
Simply moving an existing via is an adequate way around it.


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