Re: gEDA-user: overlapping via changes

[Kai-Martin Knaak <knaak@xxxxxxxxxxxxxxxxxxx>]

DJ Delorie wrote:

> 1. Via copper is now allowed to overlap when vias are created.  Via
>    drills are not.

Does pcb complain if the user tries to overlap vias. Or does it just 
silently refuse to put the via?


> 2. Vias which violate this rule in a *.pcb file are preserved at load
>    time.
> 
> Thus, PCB will make a modest attempt at preventing users from making
> vias that might be difficult to manufacture, but if the user finds a
> way around the restriction, PCB will let them get away with it.
> Simply moving an existing via is an adequate way around it.

Thanks. I'll put this to the wiki.
Back then when I used protel we actually had cases where overlapping
were holes deliberate. The hole had to be non-round and clad with metal. 
So regular milling wouldn't do.

---<)kaimartin(>---
-- 
Kai-Martin Knaak                                  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik      fax: +49-511-762-2211	
Welfengarten 1, 30167 Hannover           http://www.iqo.uni-hannover.de
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