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Re: gEDA-user: DRC/rat quirks
-> That's one. Another is that the rats for a net
> don't go away unless you
> can get your line to end exactly the right place,
> which doesn't work for
> me even with "snap to pad".
That's pretty hard to believe. The connectivity is
checked by a rigurous intersection test, no particular
points are required, any touching will do. Implied in
your statment is that after making a connection and
optimizing the rats nest (o key), a rat line suggests
the connection you just made is not making connection.
I'd really like to see a test case because I've never
seen this behavior ever.
> Also, the rat wire
> should give visual feedback
> as you route a net -- rats to routed pads should
> disappear as you place
> tracks that complete segments.
Originally it took a fair amount of compute resources
to trace the connectivity - it still can with very
large boards so updating the whole rats nest
automatically was never really considered. I think
that most computers are fast enough now that its a
viable idea to add an optional setting to optimize the
rats nest after every move, track addition, track
deletion etc. That would make the rat disappear as
soon as the connection was made.
>
> As for the DRC, I've played with a few boards. Each
> time I end up
> with at least one rat wire going between two pads
> which I can't route
> because the auto-DRC won't let me onto the second
> pad. This might be
> related to the fact that my wire didn't start at the
> right place, despite
> it starting on the snap point that caused the new
> line to exactly cover
> the rat...
This sounds like a bug. Send me a test case and I will
solve it. Do the source and target turn green when you
start the trace?
Come to think of it this coupled with your rats nest
failure above strongly suggests your layers aren't
assigned the way you think they are. There was a
release where some default layer names (which are
nothing more than names and could well be "foo" and
"bar") were something like "component" and "solder"
while they were actually grouped to the opposite side.
Check your layer groupings.
> There's another thread going on where someone is
> concerned about trusting
> a new feature in PCB when fabbing a board. Well,
> it's all new to me, and
> I don't know if I trust it yet. Maybe it has
> fabulous internals and a
> quirky interface, or maybe the internals are just as
> quirky...
pcb has a long history. For many years it was very
stable and very reliable. This past year we have made
so many sweeping changes including completely
replacing all of the user interfaces and major changes
to much of the code internals too. Some level of
skeptisism is warranted because of this. With that
said I think the latest snapshot release should be
pretty stable.
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