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Re: gEDA-user: Google SoC : Potential Candidate seeking Info



Thank you all for the feedbacks. I looked a bit deeper into the
projects and my interests and figured that , I am not into GUI stuff
but would love to get my hands more dirty with things even down.

On Thu, Feb 12, 2009 at 9:56 AM, al davis <ad151@xxxxxxxxxxxxxxxx> wrote:
>> 3. Porting of missing analysis, (noise, pz, disto, hb, etc.)
>> from other free simulators (under gnucap)
>
> All good projects ..  There is someone now working on noise and
> hb.  pz and disto would be good summer projects.  "pz" is
> fairly easy, if it is based on AC analysis, because the whole
> model interface is already working.   "disto" is harder because
> of the model interface.  You will learn a lot.

Looks interesting now for me. I will look at the current codebase. Is
this "noise" and "hb" implementation that someone is doing already
available in the VCS for me to have a look at and check the pattern of
implementation?

> On Wednesday 11 February 2009, Stephen Williams wrote:
>>> Given the apparent bent towards analog in your selection of
>>> candidate projects, might I suggest you take a look at the
>>> "gnucap Code Generator" on the Icarus Verilog projects page?
>>> This is something that Al has been wanting, and also puts to
>>> use some of the nascent analog support in Icarus Verilog
>>> proper.
>
> I like this one too.  It is an enabler that will make other
> enhancements easier, and something that is desperately needed
> as a model compiler.  There are lots of people who want it and
> some real experts who can help.

This sounds exciting too. But I am highly unsure about the things that
I need to learn before taking this project up. The Icarus Project page
says this project remains clear of the Iverilog core. It states that
one might require knowledge of how to "compile" models for gnucap. Can
some more light be thrown here please? Any nice starting pointers? I
can then catch on and start rolling.

Thank you once again.

With Best Regards,
Aanjhan


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