Re: gEDA-user: Google SoC : Potential Candidate seeking Info

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Saturday 14 February 2009, Aanjhan R wrote:
> Thank you all for the feedbacks. I looked a bit deeper into
> the projects and my interests and figured that , I am not
> into GUI stuff but would love to get my hands more dirty with
> things even down.

People spend lots of time trying to make a GUI, when there are 
problems underneath.  I am not opposed to GUI's, but it is 
important to make what is behind it work well first, and to 
keep the user interface separate from the action.

> On Thu, Feb 12, 2009 at 9:56 AM, al davis 
<ad151@xxxxxxxxxxxxxxxx> wrote:
> >> 3. Porting of missing analysis, (noise, pz, disto, hb,
> >> etc.) from other free simulators (under gnucap)
> >
> > All good projects ..  There is someone now working on noise
> > and hb.  pz and disto would be good summer projects.  "pz"
> > is fairly easy, if it is based on AC analysis, because the
> > whole model interface is already working.   "disto" is
> > harder because of the model interface.  You will learn a
> > lot.
>
> Looks interesting now for me. I will look at the current
> codebase. Is this "noise" and "hb" implementation that
> someone is doing already available in the VCS for me to have
> a look at and check the pattern of implementation?

No .. and I am not sure how it will develop.

You can look at the AC, DC, tran, and Fourier analysis to see 
how it fits.  Everything is plugins, so it is easy to 
experiment with it.  "pz" (spice method) is to "ac" 
as "fourier" is to "tran".

Another possibility is to make a "pz" that looks at saved data, 
as a postprocessor, and add the ability to do go anywhere on 
the S plane to AC, as opposed to the usual of traversing the 
j-omega axis.

Another interesting type of analysis that Spice doesn't have is 
a semi-symbolic analysis, where the result is a transfer 
function, in S, that has some values carried through as 
symbols.  I would have to help you a lot, but it would be a 
real accomplishment, and I think I know of a few places where 
you could get a paper out of it. .. at least a conference 
paper, maybe two, maybe even a journal paper.

It may sound intimidating, but there are some features of C++ 
that make it a lot easier than in other languages.

Any further discussion of it will be over the head of most 
people here, so ask about it on the gnucap-devel list, where it 
is absolutely on topic, if you want to know more.

That is the place to ask more about things like the pz analysis 
too.  Again, it is over the head of most people here, but a 
good match there.

> > On Wednesday 11 February 2009, Stephen Williams wrote:
> >>> Given the apparent bent towards analog in your selection
> >>> of candidate projects, might I suggest you take a look at
> >>> the "gnucap Code Generator" on the Icarus Verilog
> >>> projects page? This is something that Al has been
> >>> wanting, and also puts to use some of the nascent analog
> >>> support in Icarus Verilog proper.
> >
> > I like this one too.  It is an enabler that will make other
> > enhancements easier, and something that is desperately
> > needed as a model compiler.  There are lots of people who
> > want it and some real experts who can help.
>
> This sounds exciting too. But I am highly unsure about the
> things that I need to learn before taking this project up.
> The Icarus Project page says this project remains clear of
> the Iverilog core. It states that one might require knowledge
> of how to "compile" models for gnucap. Can some more light be
> thrown here please? Any nice starting pointers? I can then
> catch on and start rolling.

Unsure???...  you say you are doing a masters ..  The projects 
we are talking about are beyond what I would expect an 
undergrad to do, but it should be ok for someone doing a 
masters, especially if you are considering a research oriented 
career.  You will need to learn a lot, but that's the way it is 
supposed to be.

It may be too late to do this, but if you can, I recommend a 
course in compilers.

In this case, the parser is done.  What is needed is a code 
generator, and that is similar to others that are done.  So, 
you have a good starting point.  The interface is well defined.

A lot of the code generation is just copying with a different 
syntax.  You can do a lot of that just by text substitution.

Then the hard part is generating code for all of the partial 
derivatives.  This means analyzing an expression, figuring out 
what partial derivatives to generate, and generating them.  
Usually, they are based on the chain rule.

If you are interested in this one, again you can ask some of the 
harder questions on the gnucap-devel list, and also the Icarus 
Verilog developer list.  You should probably subscribe to both.

As to getting papers out of it, I think you could get a 
conference paper, but not a journal paper, from this one.  


Any of these are good projects.  They are all challenging, and 
will really keep you busy all summer.  Some of them could also 
be used for a master's thesis.  It is possible that you could 
use it as a start for a Ph.D.



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