Re: gEDA-user: Was there a major change to how power nets are handled in netlists?

[Matt Ettus <boyscout@xxxxxxxxx>]

> Depending on the order of the schematics on the gnetlist line, you will
> get a different net renamed (DVDD_FPGA -> Vcco2 or DVDD_FPGA -> Vcco3).
>
> This is most certainly a bug in gnetlist and probably has been there
> since the beginning of time.  I am guessing it worked in the past due
> to shear luck.  I haven't yet gone back further than 1.0, but I suspect
> this has never worked right.


You are right.  While I've been using this technique for a long time,
but it appears that my previous designs weren't bitten.

> You have three choices in the short term:
>
>        - Wait until I figure out how to fix this (no guarantees, but I
>          really don't like netlister bugs like this)
>        - Fix up your schematic to not connect multiple power symbols to
>          the same net or name the same net multiple times across sheets
>        - Post process your netlist to combine the nets which should be
>          connected together.

I'll try the 2nd in the immediate term, but it makes me nervous to use
a netlister with a known bug.

Thanks for your help,
Matt


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