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Re: gEDA-user: any last minute advice prior to sending out for PCB fab



   Check the gerbers and drill files using gerbv.
   I use a script that zips and renames all the files for the fab house.
   I take the zip file that is created, unzip it and check those files
   with gerbv.
   For a system of boards that plug into each I might panelize them
   so that they all align. You would quickly see misalignment.
   You would also save some money on the fabrication.
   (* jcl *)
   On Tue, Feb 23, 2010 at 10:01 PM, gene glick
   <[1]carzrgr8@xxxxxxxxxxxxx> wrote:

     After a very long time, I am just about ready to send out 3
     different boards for fab.  I would appreciate any advice to improve
     my chances of success.  So far here's what has been done:
     1. Run DRC on all PCBs with no issues..
     2. Checked schematics.
     3. Checked schematic matches layout.
     4. In process of checking all the components, especially the
     transistor pinouts (all SOT23 devices)
     5. Checked the board dimensions. These boards plug into one another,
     so have to be sure they match up.  It looks good physically and the
     pin numbers look correct from board-to-board.
     6. Checked the soldermask.  I found a bunch with very minimal dam
     spacing so fixed them.
     7. fixed cosmetic trace runs that looked ugly.
     8. double checked for unused traces left behind from component
     moves.
     The cash layout for PCB fab is going to be large enough that I am
     nervous about not getting it right.  Still, I have a CPU card and
     SMPS to do which can wait a bit while this gets put together.
     what else?  Any suggestions?
     thanks
     gene
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   --
   You can't create open hardware with closed EDA tools.
   twitter: [4]http://twitter.com/jluciani
   blog:    [5]http://www.luciani.org

References

   1. mailto:carzrgr8@xxxxxxxxxxxxx
   2. mailto:geda-user@xxxxxxxxxxxxxx
   3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
   4. http://twitter.com/jluciani
   5. http://www.luciani.org/

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