Re: gEDA-user: General Layers questions

[Mark Rages <markrages@xxxxxxxxx>]

On Mon, Feb 14, 2011 at 2:27 PM, DJ Delorie <dj@xxxxxxxxxxx> wrote:
>
> Each drawing layer has a record of which physical layer it corresponds
> to (if at all), so you could (for example) assign a silk layer to one
> of your internal layers, despite that not making sense.  However,
> assigning a documentation layer to an inner layer *might* make sense.
>

Please don't restrict pcb to things that "make sense".

I toured this board house: http://www.cirexx.com, and I came away with
an appreciation for how varied circuit boards can be.  Eight-layer
board connected to different layers of a four-layer board by two
sandwiched flexboards... BGA buried in an outer-layer cutout with TQFP
mounted over it... FFC that loops back on itself... Basically any
planar design you can think of can be manufactured.   So if we are
redefining the file format, let's not limit pcb to 4pcb-$33-each type
of boards.

(I've never seen a mobius flexboard design, but I bet someone has done it.)

> The stackup needs to understand the concept of inner and outer layers
> at least, so it can map a library footprint to a specific element.  Of
> course, I leave open what "outer layer" means, esp in the context of
> flex cables where a given layer might be an inner layer over here, and
> an outer layer over there...

Right.  Imagine a windowed flex board, where there is a hole to attach
parts to the "front" and "back" of a single copper layer.  Or a rigid
board with a flex board inner layer where the flexboard extends out
and and has another pcb on the other end. "Outer layer" will mean
different things as you move about the surface of the design.   Also,
the flex part will have different DRC rules than the rigid part.

And outline layers need to be assigned to layer groups somehow, since
each layer can have its own outline, depending on where in the
manufacturing process it is routed.

I think it will be a long time before PCB attains capabilities to work
on this kind of board, but it would be nice if the file format was
flexible enough to capture modern PCB fab capabilities. Blind / buried
vias and buried caps would be start.

Regards,
Mark
markrages@gmail
-- 
Mark Rages, Engineer
Midwest Telecine LLC
markrages@xxxxxxxxxxxxxxxxxxx


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