Re: gEDA-user: Vias with zero clearance in PCB?

[DJ Delorie <dj@xxxxxxxxxxx>]

> My favorite method is to use a single zero-length line to make a circle 
> that perfectly fills the clearance.

Perfectly?  Or slightly larger?  I saw one board that used this
technique, and at certain zoom factors you could see the hint of an
outline where the drawn circle didn't quite fill the hole.

> (you can even leave out one of the arcs for ultra-tight spaces).

We need a way to edit the arc angles with the GUI.  PCB has no
problems with non-quadrant arcs, you just can't create them with the
mouse.

> The major down-side to this technique is that if you adjust the via
> clearance you also need to adjust the thickness of the "solid
> thermal".

What we really need is a flag for pins/vias that means "dont' clear".

I thought about a board-global "vias don't clear polys" flag but that
messes up wave soldering, I'm not sure how useful it would be relative
to pin/via-specific flags.