Re: gEDA-user: blue sky ideas - written down finally

[Steven Michalske <smichalske@xxxxxxxxx>]

On Dec 26, 2009, at 7:11 PM, DJ Delorie wrote:

>
> I took the time to document my ideas about heavy vs light symbols and
> the pin mapping problem:
>
> http://www.delorie.com/pcb/component-dbs.html
> http://www.delorie.com/pcb/pin-mapping.html
>
> I got tired of looking it up in the mail archives or referencing it as
> "some time in the past...".
>
> If you remember me saying more about these than I wrote down, and can
> find it in the mail archives, let me know so I can add to them.
>
> DJ
>

Just thought of the case when we have a physical part with multiple  
pins for a logical function.
e.g. 15 ground pins or 4 drain pins.

A notation that specified that the pins were identical, and should be  
logically grouped would be great.

{ PIN, PIN, PIN }
	A group of pins that are electrically equal.

This makes the possibility for mapping models to symbols easier


Dual FET in SO-16

Source 1 in pins 1,2,3
Gate 1 in pin 4
Drain 1 in pins 13, 14, 15, 16
Source 1 in pins 6,7,8
Gate 1 in pin 5
Drain 1 in pins 9, 10, 11, 12


something like
[S,G,D] = ([{1, 2, 3}, {4}, {13, 14, 15, 16}],  [{6, 7, 8}, {5}, {9,  
10, 11, 12}] )

D\2 would either be pin 14 or 10


Then models can use
[node1, node3, node2]=[S,G,D]
For mapping models to symbols.


>
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