Re: gEDA-user: Success with gEDA tools...

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Fri, 2008-07-18 at 11:45 -0700, Dave N6NZ wrote:
> Steven Michalske wrote:
> 
> >>  Worked almost right away.  Note red wire and missing pullup. Keeps me
> >>  humble.
> > 
> > Green wires are less humbling, i suggest them.
> 
> I look at design efforts like golf.  Low scores are better, but nobody 
> plays a round with 18 holes-in-one in a row.
> 
> My most humbling: back in the 1980's I wrote an ECO with about 15 lifted 
> pins and 50 or so red wires, a chip glued onto the board "dead bug 
> style", plus a piece of coax (!). (Didn't catch *that* case in 
> simulation....)  This on a board with about 180 TTL packages.

I just got a board back which the assembler rather keenly produced from
draft files I'd sent during initial discussions.

Clearly labelled next to one part with silk-screen on the board 
"BUG: CAPACITOR SILK +/- SWAPPED" (discovered during in-house
prototyping, but I'd not got around to fixing it when I sent the draft
files).

They stuffed the capacitor according to the silk (wrong), and didn't
notice / think to check with me what this strange silk-screen text was
about!

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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