Re: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk

["James Johnston" <mail@xxxxxxxxxxxx>]

Ah... CircuitCAM is also what I used.  CircuitCAM defines what is known as
rub-out areas.  Google it to learn more.  Basically it is a layer drawn
during the CAM process that controls the generation of the milling layers.
All unconnected residual copper will be rubbed out, but only if it's in an
area covered by rubout rectangle.  Otherwise it just does isolation milling
with the 8 mil bit: which is a little cheaper to produce but has some of the
pains I previously outlined and isn't an accurate reproduction of the board
design anyway.

If you aren't defining rubout areas in your CAM file then I don't see why
your school would have a problem with an existing design.

For using copper fills for ground planes, well I asked the same question
awhile back, see:

http://archives.seul.org/geda/user/Jun-2008/msg00218.html

In PCB it can easily become a royal pain but it can be done.  This stems
from the fact that a polygon cannot be assigned to a net.  E.g. you can't
name the polygon "GND" and have GND traces connected to it and all others
isolated.  IIRC each trace has an attribute that determines if it's isolated
or not from any polygon.  See previous link.  If you want your
vias/thru-holes to connect to that polygon on a layer, you create "thermals"
on that layer.  Connecting SMT pads to a polygon isn't well supported now
but can be done. 

But I've only done this process once in PCB, so I'm not an expert by any
stretch of the imagination.

Top layer is "component side" and bottom layer is "solder side."  Board
outlines are created by dedicating one of the other (unused) signal layers
to a board outline and then using the resulting Gerber file for the layer to
do your board routing.

Keep persisting; to me I think there's value in storing your designs in a
package that is (1) completely free, (2) stores all files in a textual
format.  Your designs are not locked into a binary, proprietary data format
like with the other CAD design packages.  (vendor lock-in = sucks).  Think
about the designs you are making now with the school's Altium package.  If
you want to continue working on them after school you'll have to buy an
Altium license, which is probably overkill for most of your needs.

--James

-----Original Message-----
From: geda-user-bounces@xxxxxxxxxxxxxx
[mailto:geda-user-bounces@xxxxxxxxxxxxxx] On Behalf Of Kevin Bortis
Sent: Wednesday, July 30, 2008 15:52
To: gEDA user mailing list
Subject: Re: gEDA-user: PCB: rectangular polygons and route clearance in
pcb-gtk

On Wed, Jul 30, 2008 at 5:41 PM, James Johnston <mail@xxxxxxxxxxxx> wrote:
> What milling machine / software are you using?

We use the Windows only CircuitCAM software at school. In Altium I had
to add a new polygon with a 30mil clearance. This is only a school
rule and the pcb's are not going into production if this rule is not
met :)

> Of course, I routinely keep copper on many of my PCBs for things like
ground
> / power planes.  Usually I put ground on the bottom and keep signals on
the
> top as much as possible; it's worked for me so far for the relatively
simple
> PCBs I've done so far.

How you connect a polygon to the GND layer? A polygon connected to GND
would also needing a clearance to signal layers. I think this would be
the same problem. On which layer do you draw the top-layer routes?

In the Altium software and OrCAD there were always a TopLayer,
BottomLayer, TopOutline etc. , but in PCB I don't fully understand the
naming schema.

Regards

>
> --James
>
> -----Original Message-----
> From: geda-user-bounces@xxxxxxxxxxxxxx
> [mailto:geda-user-bounces@xxxxxxxxxxxxxx] On Behalf Of Kevin Bortis
> Sent: Wednesday, July 30, 2008 15:22
> To: geda-user@xxxxxxxxxxxxxx
> Subject: gEDA-user: PCB: rectangular polygons and route clearance in
pcb-gtk
>
> Hi,
>
> I try to draw my first PCB with the gEDA Tools. So far everything has
> worked and the Layout is almost finished.
>
> For the last stage it is required for me to add a massive cooper
> polygon over the pcb, because our milling machine would not be happy
> to mil all the copper away.
>
> The tool makes a perfect clearance around the pad's, but not arround the
> routes.
>
> Has anyone an idea what i could change? Eventually I have done
> something wrong with the layer because I don't really understand the
> palette from solder over component, ... , silk, ..., to solder mask. I
> have drawn the routes on the component layer.
>
> The next problem is, how can I add pcb-outlines, fiducial marks and
> add the (0,0) coordinate?
>
> If someone has some general tips that are related to pcb and milling
> machines I would be happy also.
>
> Regards
>
>
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>
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