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Re: gEDA-user: 2-layer design recommendations



Randall Nortman wrote:
I've seen some conflicting recommendations about how to design 2-layer
boards, particularly with respect to filling in all unused areas of
the board with solid copper and connecting that to ground.  I can't
dig up the reference right now, but I had read somewhere that this is
a bad idea -- something about the solid areas acting as antennae or
something like that, or traces cutting through the "planes" forming
current loops with a plane segment in the middle.

So -- two questions: Is it a good idea to fill unused areas with
copper, and what should those areas be connected to?  Should I use
them as ground, and actually connect components to them, or connect
them to ground but route ground to the components separately (star
ground)?  Or should I leave them completely unconnected?  Obviously, I
will do my best avoid ground loops in any case, which is not that hard
to acheive if you just connect one line from the rat's nest at a time,
thereby avoiding redundant connections, right?

TIA for any advice,

Randall

FWIW on the 2 layer analog/rf boards I've done in the past, my approach is to avoid any traces on the bottom and keep it as a solid ground plane. This isn't always 100% possible, but with some work I've found you can usually get pretty darn close. I've not filled unused area on the top with ground and haven't felt like this ever caused problems for me.


What I have done though is if I have a large open area, I'll put a pattern of 40 mil x 40 mil pads on a 50 mil center to center spacing on that area and keep soldermask out. This can be useful if you need to hack together some extra circuitry that wasn't included originally. My general experience is that if you include this you won't need it and if you don't you will :) The 50 mil grid is nice because you can solder down SOIC's and 0603 components with relative ease.

-Dan

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