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Re: gEDA-user: OT: (Vhdl help)



On Thursday 26 June 2008 19:47:57 Peter Clifton wrote:
>   -- I2C bus signals
>   sda : inout std_logic;
>   scl : inout std_logic;
>
> So.. my total NOOB question.. when I make a symbol for that, and
> instantiate it in my schematic, exactly how to I hook up those signals
> to a bi-directional IO buffer.
>
> The IOBUF has explicit I, O and T (direction) connections.

The way I've always done this is to put inout ports on my toplevel VHDL module 
file, and then use a constraints file to map the ports to pins. XST has then 
correctly inferred that I wanted a tri-state buffer (I think there's a flag 
you have to set in the constraints file entry, but it's been a while...)

Cheers,

                          Peter

-- 
Peter Brett

Electronic Systems Engineer
Integral Informatics Ltd

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