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Re: gEDA-user: PCB: Stale rat's nest?



Ales Hvezda wrote:
[snip]

Older pcb's didn't support netlists *in* the pcb file itself.  Since
we do now, perhaps gsch2pcb could just put the netlist in the newly
created file?



	Sounds like a good idea.  Anybody have some spare cycles to
tackle this?


In case someone beats me to it... we should cause gsch2pcb to also run 'gnetlist -g pcbpins' and tell the user to execute the actions file which results (assuming you have a new enough pcb). That will foward annotate all pin names from schematic to layout. Lets you use a generic footprint but get component specific pin names in the layout.


-Dan