Is there a free software tool to perform a layout extraction to get the
parasitics associated with the layout?
For IC design/layout, I believe that the open-source tool Magic will
extract the parasitics to a SPICE netlist.
For PCB layout, there is no tool, at least as far as I know. The
reason is that the PCB fab process is less well characterized & more
variable than the IC process. Also, real models for the parts used
don't exist. Most op-amps, etc., provide only macromodels, which
don't capture this kind of info.