[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]
gEDA-user: Layers limit in pcb
Hi folks,
A project I'm involved in has a rather large and complicated schematic for a
PCI card that is currently being migrated to gEDA via gschem, and hopefully
artwork will be created for it using pcb. Unfortunately... it'll need more
than 8 layers (and yes, this is certain -- schematics & artwork for the board
will be released under the LGPL or GPL, but they're currently in a
proprietary format, so they're being converted to open formats before
release. :)
Anyway, back to the point: what's the state of play with many-layered boards
in pcb?
Peter
--
Quake II build tools: http://peter-b.co.uk/
v2sw6YShw7$ln5pr6ck3ma8u6/8Lw3+2m0l7Ci6e4+8t4Eb8Aen5+6g6Pa2Xs5MSr5p4
hackerkey.com