Re: gEDA-user: basic anti-EMI design q

["Phil Taylor" <phil@xxxxxxxxxxxxxxxxxxxxxxxx>]

DJ Delorie <dj@xxxxxxxxxxx> wrote:

> > As for the 100k, this value is kinda big in a gate circuit to my ears.
> 
> 1k seemed small, but I'm open to detail suggestions once I post schematics.
> 
> > If you have fast logic following this fet,
> 
> The outputs are 1wire and 9600 baud, nothing that fast.  The input is
> polled, I can do glitch detection in software.

Running fets slowly will cut down on transients in your power lines.

A pretty good fet driver, that has a benefit of some isolation is to drive the
fet gates with an emitter follower bjt.   You make Re small (like 750 ohm on a
5V rail) for say several milliamps when on.  You adjust the current in this
stage so that it has the right high freq. needs you have more-current = more
bandwidth.

You can run this emitter follower driver from a _filtered_ higher voltage than
your logic, which makes the gate charge up, and hit threshold, a lot faster. 
You can RC filter the supply for the emitter followers close by, and tap
straight from the rail the fet is switching in.

Another benefit, here is the low impedance emitter resistor, tying your gate
to ground (and the circuit off) for no noise and a safe default = off
status.