Hi,
I would suggest using valgrind( [1]http://valgrind.org ) to
debug this issue. It's very simple and direct to use, just read the
quick intro( [2]http://valgrind.org/docs/manual/quick-start.html ) of
its documentation and you're ready to go. You must compile with -g O0
in order to avoid invalid reports from valgrind.
something like
$valgrind pcb --blablabla
should just work, but there are other useful options I just don't
remember well right now. It's an excellent tool for debugging memory
leaks very quickly.
Best Regards, Felipe.
--
Felipe De la Puente Christen
Mobile Phone : +56 9 93199807
MSN/GTalk : [3]fdelapuente@xxxxxxxxx
On Sat, 2010-03-13 at 05:05 +0000, Kai-Martin Knaak wrote:
On Fri, 12 Mar 2010 22:45:28 -0500, DJ Delorie wrote:
>> But what I really want, is a print of the components on the bottom side
>> of the board.
> Add the solderside layer to your layer stack string (see attached code
> snippet)
Thanks.
This finally worked :-)
I added this tip to the wiki.
For the archive:
pcb -x eps --layer-stack "outline,silk,solderside" \
--as-shown \
--action-string 'Display(Value)' \
--eps-file "/tmp/out.eps" phasen.pcb
>> Any idea where to look for a reason for the segfault?
>
> gdb?
I feared so ;-)
>> Looks like the manual is derived from pcb/doc/pcb.texi . So I'll edit
>> this file and and post a diff to this mailing list, right?
>
> Yup. Git patch format, please.
That is, use the command "git format-patch" ?
Any options to add?
---<(kaimartin)>---
References
1. http://valgrind.org/
2. http://valgrind.org/docs/manual/quick-start.html
3. mailto:fdelapuente@xxxxxxxxx
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