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gEDA-user: SFlags definition question
Hello All,
Sorry to bother you again with a novice question. I'm in the proces of
understanding PCB so please be gentle.
I have a component (DPAK) on the top (component) side of my pcb,
surrounded by a polygon. I have connected one pad to the polygon by
using copper trackes. I also have a polygon on the bottom (solder) side
of my pcb, right beneath the one on top. I have connected the two
polygons through via's with a solid connection to the plane (polygon).
Now I want to free the via's of any soldermask on both sides of the pcb.
So I press the "K" key until the clearance is OK.
So far so good. Now my question:
I like to fully understand how PCB works so I look in the .pcb file with
a text editor and found.
Via[312000 280000 4000 2000 0 2000 "" "selected,thermal(3S)"]
and
Via[302000 261000 4000 2000 4000 2000 "" "selected,thermal(0S,3S)"]
I understand that the first one has no clearance and the second one has.
Question 1: is the clearance valid for both sides of the pcb?
Question 2:
In the documentation (pcb.pdf generated during installation) I find in
section 8.8.28 Via that the last argument is an SFlags.
In F.1.76 SetThermal I find that Style = 3 means a solid connection.
So I do not understand what thermal(3-->S<--) means or (0S,3S).
Can anyone help me? Where can I find this kind of information (e.g.
definition of SFlags)?
I hope you can help, thanks.
Regards, Robert
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