gEDA-user: gschem: net attribute for power I/O, clean appearance? (no â:1â)

[Colin D Bennett <colin@xxxxxxxxxxx>]

Has there been any work or planning toward making it easier and
less error-prone to produce schematics using âtidyâ single-pin nets for
power symbols and I/O port symbols?

By âtidyâ, I mean that the completely unnecessary â:1â should
not be shown on the schematic.  I try to name my power nets with
descriptive names (not just VDD, etc., in most cases).  Also, the I/O
port symbols (input-1.sym, etc.) are often very useful to produce clean
schematics, but if you want a truly clean schematic without the clutter
of dozens or more â:1â suffixes, the only way I know is to hide the
ânetâ attribute and use a separate âvalueâ attribute.  The problem is
that these must be kept synchronized or you will have serious errors in
your circuit!  You would have to manually check every pin for
consistency.

(NOTE: When I say âcompletely unnecessaryâ, I mean that I never use
buses/multi-pin nets so the â:1â is redundant in this context for me.
Of course it could be assumed if omitted... hint hint hidden option 3.)

Currently I see only two choices when you use I/O port symbols or
custom power symbols:


Option 1: Put up with the clutter of the â:1â suffix on every net
connection.
Example: generic-power.sym
Pros: + No risk of errors: the displayed text is the real net name.
Cons: - Visual clutter in the schematic. 
      - I never use multi-pin nets anyway; the â:1â is meaningless.

This even worse when you have an array of nets that end in a digit.  For
instance, I have a circuit that has INNER1, INNER2, INNER3, etc., and
these use input/output port symbols so they appear as INNER1:1,
INNER2:1, INNER3:1, etc. on the schematic.  It's very difficult to
parse the actual net name by eye when there are dozens of such pins.


Option 2: Hide the ânetâ attribute and duplicate the name in a âvalueâ
attribute.
Example: input-2.sym (aften adding and editing ânetâ and âvalueâ
attribute values, hide the ânetâ attribute)
Pros: + Clean, readable schematic.
Cons: - Risk of errors if ânetâ and âvalueâ attribute disagree.
      - Tedious to edit both attributes for each I/O port symbol
        on large schematics.


Hidden option 3: Make gschem assume â:1â for ânetâ attribute values
without a â:Nâ suffix.

This seems like it would be an easy fix for the problems resulting
from Option 1 and Option 2, but I'm no Scheme or gschem hacker.

I understand that the ânetâ attribute is used in a number of different
ways, but for this specific purpose it would be nice to have a good
solution if it's not too difficult.

Another option would be to add a DRC check to the gnetlist backend to
ensure that ânetâ and âvalueâ attributes agree, thus eliminating at
least the possibility of a hidden error in the schematic.

Thoughts?

Regards,
Colin


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