[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: gEDA-user: fritzing

John Griessen wrote:
> How about the code intensive hardware system developers that start
> a project with FPGA then migrate it to ASIC?  What language do they use -- c++?

Typically they'll use a HDL like Verilog or VHDL. Those are generally 
compatible across FPGAs and ASICs alike. There have been attempts to use 
C++ for hardware design, but they haven't found their way into the 
mainstream.

There are newer HDLs starting to find more use though - System Verilog 
is becoming popular among some of my colleagues.

Eric


_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user