Re: gEDA-user: fritzing

[Ben Jackson <ben@xxxxxxx>]

On Mon, May 11, 2009 at 11:17:32AM -0700, Eric Brombaugh wrote:
> When doing an FPGA design, I can as an individual manage a project that 
> completely fills the largest FPGA available. Working on a large 
> commercial IC development project requires the skills of dozens if not 
> hundreds of experienced engineers.

Well, that's basically my point.  Working on a large IC requires a huge
team of people.  I live right by Intel, so I see how many people they have
swallowed up to do chip design.  My complaint is that the complexities of
designing chips or FPGAs is very poorly abstracted as compared to software
at large.  The only reason it's possible to execute those designs at all
is that on an absolute scale they're fairly simple.  That's no slight on
the people doing the work -- it's just a reflection of how ineffective
the tools are.

You describe the ASIC tools as being much more sophisticated than the FPGA
tools.  That's true, but it's only because the ASIC problem is even harder.
The better tools don't make it any easier than FPGA work, they just make it
possible to design such complex chips at all.

> As someone with experience on both sides, what improvements would you 
> like to see?

I would like to be able to express the essence of what I need to do, such
as an arithmetic operation, without having to understand how it should be
pipelined, how wide the intermediate results need to be, how it should map
to the facilities of the FPGA (or hard macros or etc), etc.  I would like
to be able to take that design and target FPGAs from different families
or vendors without having to reevaluate the design tradeoffs.  Even if I
*did* have to make the choices manually (eg where to register intermediate
values), I'd like to control those aspects independently from the core
logic, rather than having to mix it in.

-- 
Ben Jackson AD7GD
<ben@xxxxxxx>
http://www.ben.com/


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