Re: gEDA-user: Broken TO92 footprint

[Stephen Trier <stephen.trier+geda@xxxxxxxxx>]

   Cullen,

   I suspect the TO-92A/B/C notation comes from some layout package, and
   that is why other packages use other terminology. It is not in the
   original TO-92 spec, which is available free (registration required)
   from JEDEC at <URL:
   [1]http://www.jedec.org/standards-documents/focus/registered-outlines-j
   ep95/transistor-outlines-archive >.  All of the TO-xxx standards define
   only the mechanical outline of the package and do not prescribe
   functions for the pins.

   JEDEC's archives are a great resource for footprint design.  They are
   the original source for many of the drawings you find in datasheets,
   and it is very nice to find a standards organization that doesn't lock
   up their documents behind a paywall.

               Stephen

References

   1. http://www.jedec.org/standards-documents/focus/registered-outlines-jep95/transistor-outlines-archive


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