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Re: gEDA-user: VHDL Compiler
On Tue, 2003-11-11 at 21:35, Evan Lavelle wrote:
> 5 Synopsys built their business on DC and Verilog. Synopsys have
> always, and are still, going to great lengths to bury VHDL.
but synopsys sold VSS as their main simulator until they bought vcs.
>
> 6 Cadence and Synopsys basically own EDA.
ncsim? modelsim? is EDA or simulation the question here?
perhaps it would be worth noting the speed benefits of gate level verilog
here if you want to be historical too.