gEDA-user: PCB 20070912 surprising silk behavior

[Dave N6NZ <n6nz@xxxxxxxx>]

Back silk seems slightly goofy in two ways: color, and clearpoly behavior.

My board has solid polygons going out to the edge on the back side. I 
flipped the board over to draw a board outline on the back silk using 
the line tool. This yielded two surprises:

1) The back silk line insists on being green.

2) The lines were drawn with "clearpoly", clearing the edges of my 
polygons. I had "new lines clear polygons" turned on.

These seem like bugs to me, but in any case, they both violate the 
principal of least surprise.

1) I would expect back silk color to be black, or to follow a setting in 
the color dialog.

2) I can't imagine why a line drawn on the silk layer should clear a 
solder-side polygon.  That's just wrong.  Now, if I had a back silk 
polygon, I could see that "clearpoly" is a legitimate flag so that a 
silk line could clear a silk polygon.

Anyway, I found the offending lines and hand edited out the "clearpoly" 
flags so my design is OK.

-dave


_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user