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Re: gEDA-user: Request for VHDL and Hierarchical Spice References



On Wednesday 28 November 2007, Steve Meier wrote:
> I am seeking good references for verilog, VHDL and spice
> syntext specificaly with the idea of supporting hierarchical
> net lists. Online or recomendations for purchase.
>
> I desire this material as my code is reaching a level of
> maturity that would make simulation of complex designs
> interesting.

The Verilog-AMS LRM can be downloaded from:
http://www.verilog.org/verilog-ams/htmlpages/public-docs/lrm/2.2/AMS-LRM-2-2.pdf

The development version of gnucap accepts (and prefers) netlists 
in Verilog format.


For Spice, there is no standard.  The closest thing there is to 
a standard is the way Spice-2 works.  Almost everything else is 
a proprietary superset of that.

A better spec for a Spice "standard" is to take the intersection 
of what Spice-2 does and what Spice-3 does.

It's a mess.  It started out as a good design, with two obvious 
defects that could have been easily fixed at the time, but 
later extensions were done poorly and have become rather hard 
to deal with.  

What are the two obvious defects? 1. The use of the first letter 
of the label to indicate type.  2. Irregular and inconsistent 
syntax.

To see an example of a Spice-derived format that has the two 
obvious defects fixed, look at the Spectre format, which is 
technically proprietary.  It's an excellent format.  Too bad it 
isn't used anywhere else except Spectre (and now gnucap, 
through a plugin).

Gnucap still accepts Spice format, and always will.  In future, 
plugins will make it possible to support variants of the Spice 
format.


If all you care about is netlists, it is easy, except Spice.  It 
might make sense to look at the gnucap language plugins.  By 
making a simple driver, we could easily have a complete netlist 
translation system.  If it doesn't get done first, that driver 
will be one of my proposals for next summer's google soc.





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