On Mon, 2009-11-09 at 15:01 +0100, Stefan Salewski wrote: > On Mon, 2009-11-09 at 13:48 +0000, Peter Clifton wrote: > > > > > > > > > Does debug option work for other people? Or should we never use it? > > > > I've had trouble with the "debug" option before, but it is probably > > telling us something useful. > > > > Your board works fine without the debug option, right? > > > > Yes, seems to work all fine. But I like to be more sure that all works > fine. Attached is a minimal test case distilled from your board.. it was incredibly sensitive to removing objects, so took a long while to produce. It is somewhat sensitive to swapping the order of the Vias in the PCB file, and is _very_ sensitive to changes in the X-coordinates of the pair which are close together. (I believe the via on the right hand side of close pair is just required "somewhere to the right.." to trigger the bug). Just a note for developers, I'm seeing the assertion triggered in the no-holes dicer. I wonder if it is encountering left-over VNODE labelling from the previous dicing pass? I also wonder... is harmless to remove this assert..? PCB seems to work fine without it. Best wishes, Peter C.
Attachment:
poly_assert.pcb
Description: application/pcb-layout
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