Re: gEDA-user: How to deal with single/dual parts?

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Thu, 2009-11-19 at 01:23 +0000, Kai-Martin Knaak wrote:
> On Wed, 18 Nov 2009 16:17:02 +0000, Peter Clifton wrote:
> 
> > It is a perfect example of why gEDA can never grow more "friendly"
> > interfaces to these problems. _Because_ the existing interface can be
> > abused - and people think it is a good idea to encourage such
> > "flexibility", we end up with designs out there relying on the
> > behaviour.
> 
> Let me get this straight: Is the combination of a (slotted) symbol with a 
> seperate power symbol such an abuse that just works by accident? 

Not at all.. (I probably wasn't specific enough)..

Lets say I have a symbol:
    ____
---|    \____
---|____/


That might have 4 slots - IE.. I expect 4 of those nand gates in the
chip.

It might also have power pins (another symbol), and a couple of NOR
gates.. (another, SLOTTED symbol - with two slots).

If they fitted a dooms-day device controller on the spare die-space of
the chip.. that again, could be a separate symbol.


We could "probably" do with some additional annotations "somewhere"
about exactly what pieces constitute a physical device - or sub-circuit,
but that that would be an addition - rather than the abuse of an
existing interface.

Additional information might (for example), prevent me using the wrong
power-pin symbol with the wrong op-amp. I don't even want to start
thinking about how to design a flexible specification for such
annotations though.

Best wishes,

Peter C.




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