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Re: gEDA-user: Hierarchy viewer and database proposal
John Griessen wrote:
So,
As you imagine the proposed hier class, would it allow going back to
hierarchical after a drc run flattens the design?
Yes. However, if a tool doesn't modify the flattened design, we can
just re-read it, or keep a non-flattened copy that we can go back to.
Hierarchy reconstruction is mostly useful after some major netlist
modifications, such as technology mapping.
Would the flattened design not even be saved and the design data files
saved as hierarchical always?
I don't see a good reason to save the flattened netlist, unless we've
modified it somehow. If we're modifying netlists, it's probably because
we know something about the components. For example, they could be from
a Synopsys library, and a tool could be doing some sort of logic
manipulation. In that case, we'd write out structural Verilog or VHDL.
For now, I want to do the simpler stuff, like netlisting.
Bill