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Re: gEDA-user: Newbie wondering about simulation
On Oct 24, 2010, at 6:29 AM, Hannu Vuolasaho wrote:
> Hello!
> I'm newbie with simulaition and I thought I was able to defeat this
> problem but its ghost still walks with me. The next design is too big
> to be calculated reasonably with paper, pen and TI-85.
> First the versions: gschem 1.6.1.20100214 ngspice-20 : Circuit level
> simulation program
> These are from Arch linux' AUR and packages.
> In my second simulation ever I downloaded spice files from IRF. Then I
> put one FET to my design and tried to simulate.
> As I discovered the FET had to be X1 because it is subcircuit. Howevere
> gnetlist -g spice-sdb generates it as MX1 which doesn't work. ngspice
> says it can't find model.
> So what I'm doing wrong? Changing manually to X1 makes the simulation
> work but it isn't really the Solution.
The spice-sdb back end tries to figure out what the correct SPICE prefix is and "repair" it for you. You can turn this feature off with the --nomunge flag ("gnetlist -g spice-sdb --nomunge"), or you can change your device= attribute to something it doesn't recognize.
> I've copied below parts of sch
> and net file.
> I'm curious about the last line in net file. It says M1. Is it version
> of model name of something or what? The ideal PMOSFET used in creating
> the IRF FET which acts like real device?
It's a four terminal (drain, gate, source, substrate) internal FET. I presume the part you clipped has the package parasitics in it.
> Thanks in adance
> Hannu Vuolasaho
> From sch file the FET is declared as:
> C 49200 45800 1 0 0 pmos-3.sym
> {
> T 49800 46300 5 10 0 0 0 0 1
> device=PMOS_TRANSISTOR
> T 49900 46400 5 10 1 1 0 0 1
> refdes=X1
> T 49200 45800 5 10 0 1 0 0 1
> file=./spice/irf7410.spi
> T 49200 45800 5 10 1 1 0 0 1
> value=irf7410
> T 49200 45800 5 10 0 1 0 0 1
> model-name=irf7410
> }
> and net file:
> *********************************************************
> * Spice file generated by gnetlist *
> * spice-sdb version 4.28.2007 by SDB -- *
> * provides advanced spice netlisting capability. *
> * Documentation at http://www.brorson.com/gEDA/SPICE/ *
> *********************************************************
> *vvvvvvvv Included SPICE model from ./spice/irf7410.spi vvvvvvvv
> .SUBCKT irf7410 1 2 3
> **************************************
> * Model Generated by MODPEX *
> *Copyright(c) Symmetry Design Systems*
> * All Rights Reserved *
> * UNPUBLISHED LICENSED SOFTWARE *
> * Contains Proprietary Information *
> * Which is The Property of *
> * SYMMETRY OR ITS LICENSORS *
> *Commercial Use or Resale Restricted *
> * by Symmetry License Agreement *
> **************************************
> * Model generated on Jan 27, 03
> * MODEL FORMAT: SPICE3
> * Symmetry POWER MOS Model (Version 1.0)
> * External Node Designations
> * Node 1 -> Drain
> * Node 2 -> Gate
> * Node 3 -> Source
> M1 9 7 8 8 MM L=100u W=100u
> .MODEL MM PMOS LEVEL=1 IS=1e-32
> CLIP CLIP CLIP
> *^^^^^^^^ End of included SPICE model from ./spice/irf7410.spi
> ^^^^^^^^
> *
> *============== Begin SPICE netlist of main design ============
> R3 1 2 1k
> MX1 n1 2 0 irf7410
> V2 1 0 pulse 0 10 10n 10n 100n 500n 3u
> V1 n0 0 pulse 0 10 10n 10n 100n 1u 2u
> R1 n1 0 1k
> C1 n0 n1 3.3nF
> .end
>
>
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John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx
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