Re: gEDA-user: Introduction and some questions/thoughts on gEDA/gaf...

[Magnus Danielson <cfmd@xxxxxxxxxxxx>]

From: Paul Bunyk <pbunyk@xxxxxxxxx>
Subject: Re: gEDA-user: Introduction and some questions/thoughts on gEDA/gaf...
Date: Fri, 9 Sep 2005 22:12:36 -0700
Message-ID: <643e3e0e0509092212335096d@xxxxxxxxxxxxxx>

> > I need to read up on gnetman and also learn the internals of gnetlist
> > (not the scheme backends, but the c program part).  You're right that
> > gnetman does hierarchical netlisting, but I want to understand why one
> > needs to use that rather than making gnetlist do it. 
> 
> Maybe because having those pesky X*s, U*s, etc. in C-gnetlist->scheme 
> gnetlist interface would break ALL netlisters simultaneously? ;-) OTOH,
> how do VHDL/Verilog/VAMS guys live without hierarchy, do they consider
> a piece of VHDL code to load into an FPGA a "single entity"? Just curious...

We live very happilly with *ALOT* of hierarchy in our designs. So I don't
really understand the problem. On each hierarchial level we have labels for
each instance (in VHDL you might skip them for certain constructs, but that
comes at the price of not being able to pin-point things in the simulation).
So, instead of a flat namningspace and a flat netlist, we have a hierachial
system for them all.

As for what we load into the FPGA, that is the top entity of the hierachially
designed system. The only time I don't do hierarchy is when I do a pointless
test of the synthesis system by having a not-gate synted.

Cheers,
Magnus - blame me for the original VHDL backend...