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Re: gEDA-user: Linear voltregs: Symbol bugs or features?
The less that is hidden the less you have find ;-)
I would rather see the symbols have explicit ground and power pins. At
the Freedog
meeting we first debated whether to rewrite all of the geda tools in
APL or TECO and then we discussed having the first gate in a package
contain the power and ground pins. There would be a checkbox to
disable the display of the power and ground pins.
Having the implied net names for power pins is problematic for systems
with more than one ground.
(* jcl *)
On 9/22/05, DJ Delorie <dj@xxxxxxxxxxx> wrote:
>
> > in a schematic that the power pins are hidden by default
>
> Hmmm... a generic gEDA feature that pins on a part can be either
> exposed or hidden. If hidden, they connect to some net automagically.
> If exposed, they connect like any other regular pin. We might not
> even need to edit the symbols to do this, aside from perhaps defaults.
>
> We'd need some way of editing the net they connect to, and "peeking"
> at the hidden connections easily (maybe the pins appear with net names
> when the mouse hovers over the part?).
>
> A cool spin-off would be a "ground and hide" hotkey to tie pins that
> would otherwise float.
>
> I agree that "Vcc" is a poor choice for net name these days. I've
> seen symbols with nets named "+5V" or "-12V" which is at least safer.
>
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