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Re: gEDA-user: Linear voltregs: Symbol bugs or features?

Stuart Brorson wrote: 
Stuart Brorson wrote:

I am one of the folks who thinks that component symbols should not
have hidden pin connections.  Indeed, this problem is really acute
when the symbols live in a library, since newbies won't know that the
pin is connected to GND unless they open up the symbol and look at the
attributes.


As long as you do standard stuff, for example a uC circuit w/
+5V and GND only, everything is fine.


Heh. You've illustrated my point very well. +5V logic supplies
havn't been "standard" for a number of years. Logic supply
voltages are all over the place now. +3.3V is arguably more common
than +5V logic (for commercial-grade designs), and +2.5, 1.8V, and
1.5V are also seen. Therefore, I don't favor "out of the box" symbols
to have hidden +5V supplies.

Lets not even talk about ECL parts where VCC is 0 volts and VEE is -5.2 volts. "Hey, how come all the 10H116's on my board are smokin' hot?"

Also, mixed supply designs are common. If you make a 3.3V logic part with implicit "VDD" power and you also have some 1.8V logic which also uses implicit "VDD", you've got problems in the form of a magic smoke leak.

Implicit power connections are evil! The only place were I don't think so is DJ's example of the actual ground symbol or an actual VDD symbol. But there, you're paying attention.

-Dan