Re: gEDA-user: next PCB release - 1.99za vs 4.0

[Andrew Poelstra <asp11@xxxxxx>]

On Sun, Sep 12, 2010 at 11:09:25PM -0400, DJ Delorie wrote:
> 
> Thinking about drills...
> 
> If a cutout is a property of an insulating layer, the a drill through
> the whole PCB is really a composite of 2N+1 drills through N insulating
> layers and N+1 conductor layers.
> 
> That seems kludgy to me.  Drilling is a single operation, why do we
> have to represent it as multiple objects ?
> 
> I'm thinking we structure the layers into "composites".  Each
> composite contains some conductor/insulator layers, including other
> composites, and an overall shape (outline, drills, slots).
>
 
This is mathematically sound...
 
> Thus, a drilling operation is stored as a single "drill" object in the
> composite's outline layer, and buried vias are just drills on a
> sub-composite.
>

...but your number of "sub-composites" grows exponentially. In theory,
whatever the lowest-level composite is, your sub-composite set is the
power set of that!

> The heirarchy of composites represents the manufacturing process, so
> implicitely defines the possible blind and buried vias - you either
> drill through a composite or you don't.  If a composite happens to
> represent copper layers 4 and 5 and the insulator between them, you
> get a buried via.  If the composite is layers 0 and 1, you get a blind
> via.  If it's the top-level composite, you get a regular via.  Etc.
> 
> This also solves the "which insulator is the copper on" problem,
> because it's on the ones it's in the composite with.  They'd all have
> the same shape anyway, you just limit the conductor layers to the
> shape of the composite.
> 

Well, no, now you've got the "which composite is the copper in" problem ;)

> Within each composite, we'd still need to figure out how to store the
> physical stackup (order, groups, etc) and do the usual top/bottom/drc
> stuff.
> 
> I'm not sure how to reflect this though: consider two flex pcbs
> connecting the tops/bottoms of two rigid PCBs, one with two layers and
> one with four:
> 
>    -----------------------------
> -----                         =====
> -----                         =====
>    -----------------------------
>

Exactly. I really like where you're going with this - it looks like it
could be elegant and very expressive. How to get there, though, I don't
know. Maybe sleeping on it will help.
 
> Now what about two flex pcbs that leave a rigid pcb on the same side,
> one on the top and one on the bottom, yet lead to two unrelated rigid
> pcbs?  Do those other pcbs need to share layer groups, or need to be
> separate?  Where the two flex pcbs overlap on the one rigid pcb
> they're part of the same composite, but where they leave that pcb they
> become two separate things.
> 
> Or does PCB need to know that a "pcb assembly" may be made of multiple
> separate PCBs assembled later?  I.e. spit out separate gerber sets for
> the flex pcbs and the three rigid pcbs?
>

In theory, PCB never needs to know how an entire "pcb assembly" is
composed. That's the fab's job. IME most multi-PCB projects involve
socket/plug combinations so that the different components can plug
into each other and you don't have to worry about shared traces or
layers.

To some extent, we can allow this sort of thing by giving complete
freedom to the geometry of the composite. So you could have boards
that look like (from the side, I can't ASCII anything better):


                           =======================
=======               ============================
==================================================
============================
============================

if you really wanted. I've contemplated all sorts of silly "artistic"
designs, such as mounting ICs atop pyramids and running traces through
tunnels, etc, and if I could find such a design tool I might even
contemplate building such a thing.

I'm sure there are practical uses, too.

And if you combine this functionality with a 3D view, pcb would
truly be a killer app. But I can dream...


Andrew
 


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