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Re: gEDA-user: trcing with pcb design



On Wed, 2011-09-14 at 16:41 -0400, DJ Delorie wrote:
> PCB's netlist is readily available within pcb's innards, and easily
> parsable out of the *.pcb file.  So far nobody's needed it so there's
> no command to extract it, that's all.
> 
> If you have a specific format you need it in, your best choice is to
> write an exporter for it, then you can extract it with a command line
> option.

The netlist which is are available internally (and in the PCB file) is
the forward-annotated netlist.

If you wanted to extract the as-built connectivity from a layout
(possibly one without a netlist specified in the PCB file), one would
have to re-construct a new netlist by tracking connectivity as per the
"F" key to find connected copper.

Should be a simple enough algorithm if anyone cares to implement it.

1. Start with list of all package pins
2. Pick a pin from the list and remove it (this becomes our new "net")
3. Explore track connectivity from that pin
4. Remove all "found" pins from the main pin list and add to the net created in 2.
5. Repeat from 2. until main list is empty.


This should produce your traced (back-annotation) netlist.

To be useful though, you would need either:

1. A schematic editor which cared, and could guide you how to update the
schematic - if you wanted to bring it into sync.
2. A netlist diff tool
3. Something else useful to do with the extracted netlist ;)


Anyway - this is just one form of back annotation. For many operations,
change-by-change back-annotation would be easier to deal with than just
throwing an extracted netlist back at the schematic editor.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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