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Re: gEDA-user: trcing with pcb design
> If you wanted to extract the as-built connectivity from a layout
> (possibly one without a netlist specified in the PCB file), one
> would have to re-construct a new netlist by tracking connectivity as
> per the "F" key to find connected copper.
I would think PCB would already have one of those, else how to we
compare the current layout to the netlist when we optimize rats?
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