Re: Rep:Re: Re: [f-cpu] No latches, please !

[Yann Guidon <whygee@f-cpu.org>]

hi,

nicO wrote:
> Yann Guidon a écrit :
> > nicO wrote:
> > > Some example :
> > > http://www.cse.psu.edu/~cg577/hw1s98.html
> >
> > i have looked and i was surprised by the first drawing
> > (first attachment) : there is no feedback loop that memorizes
> > the data :-/ is it precharged logic ? :-(
> 
> Of course not !
> 
> You just discover the difference between a flipflop and rs bascule.

????????????????????????

both flip flop and latches (modified R/S) have a storage element,
usually in the form of at least two inverting cells that are 
tied together. A set-reset is just a form of a modified
dual-inverter memory loop, where it is possible to change the state
of the memorised bit (without using driver strength tricks).
A "transparent latch" is a modified RS with some control logic.
A FF is a set of 2 chained Transparent Latches with opposite
clock sensitivity.

unless people lied to me "à l'insu de mon plein gré" ?

Now, if the latching cell has no "feedback loop", and it is not
precharged, i wonder how it can memorize any data... maybe using
the gate's capacitance ?

> nicO
WHYGEE
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