Re: [f-cpu] (next) crazy idea about immediates

[Michael Riepe <michael@stud.uni-hannover.de>]

On Wed, Jan 08, 2003 at 12:31:56PM +0100, devik wrote:

> during night I got other crazy idea - but interesting.
> All data needs to be aligned. Ok. We can also suggest
> aligning structures to cacheline boundary (and malloc
> would return such aligned pointers).

That may cause a lot of internal fragmentation.

> We could support load/store with 5bit immediate value
> which would be ORed with physical address in register.

Umh... yet another load/store instruction?

> This way there is no need to change LSU working, no
> other pipeline stage, no problems with exceptions.

You'll have to check for correct alignment.

[...]
-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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