Re: [f-cpu] GCC and jmpz vs. jmpl

[Michael Riepe <michael@stud.uni-hannover.de>]

On Wed, Jan 08, 2003 at 11:15:21AM +0100, devik wrote:
[...]
> > Since `neg' is rather slow (two cycles), it's probably better to use
> > `andi $1, r3, r1' to isolate the LSB.
> 
> but is we need to convert 0->0 and -1->1 neg seemed
> to do the job. From manual it seems that incrementer
> does its job with 1 cycle latency which holds
> for inc/dec/neg/cmp.....
> Who added next cycle ??

The INC unit needs 2 cycles because it became too complex.
Life's a bitch, you know...

[...]
> The main (hypothetical question) was how complex is to add
> cmpe into incrementer - probably there would have to be XOR
> before it and it is too much gates, am I right ?

The XOR is already there (it's needed for cmple/cmpg/min/max), and the
`reduce' tree is there as well. I could just tap its result bits and route
them to the output - but that would still be a 2-cycle operation. That
is, it won't be any cheaper than `xor.and'.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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