[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]
Re: gEDA-user: Polygon clearance for pairs in PCB
On Sat, Apr 08, 2006 at 12:00:16PM -0600, John Doty wrote:
>
> On Apr 8, 2006, at 11:58 AM, Levente wrote:
>
> >On Sat, 8 Apr 2006 10:35:28 -0400
> >DJ Delorie <dj@xxxxxxxxxxx> wrote:
> >
> >>You want the "solid thermals" option we've been talking about.
It would be nice to have option to change the thermal position from
X to + too. Good for if the X style collides with something.
CL<
> >
> >It would be nice to be the default for vias, since you don't solder
> >anything into a via, do you?
>
> Blue wires ;-)
>
> John Doty Noqsi Aerospace, Ltd.
> jpd@xxxxxxxxxxxxx
>