Re: gEDA-user: chipscope vs. rerouting signals to test pads/pins

[gene glick <carzrgr8@xxxxxxxxxxxxx>]

> Would like to find out what that iteration to get different outputs is like.
> 
> Is it like running the place and route pin mapping step for the FPGA you're using
> without changing the "synthesized" level of the design?
> 
> John Griessen

That's correct - you don't run synthesis all over again.  I'm going to 
have to go and download the tools, so I can be more specific.

What you do is have a couple of unused pins hanging around.  Then, after 
you've done the synthesis and place and route, you run the fpga editor 
(that's the part I'm forgetting - this may be the wrong tool, so bear 
with me).  It's a real simple matter to connect the unused pins to any 
internal node.  When done, you rerun the bitgen and you are done.  The 
bit file gets used reload the fpga.

I remember the apps engineer telling me how to do this, and my jaw sort 
of dropped.  He said, "hey, you're not recoding the whole thing every 
time are you?" :)

Anyway, I'll go get the stuff and find out for you.  I have to reboot 
into windows - blah :D


_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user