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Re: gEDA-user: Attribute Net (without pin assignment) - for Power and Port Symbols



On Wed, 2011-04-13 at 16:23 -0400, DJ Delorie wrote:
> > We'd have to work a bit on the syntax, precedence, resolution rules and how to
> 
> For PCB attributes, we're going with foo:bar for heirarchy (or at
> least grouping), so U3:14.net=+5v ?
> 
> (: for heirarchy, . for attributes ?)

I thought we used "/" for netlist hierarchy. At least - that is what I
coded for the netlist viewer in PCB.

I guess just because we use one for netlists doesn't mean we can't do
something different for attributes though, but if it is basically a
mirroring of the netlist hierarchy, we should probably go with that.

I'd put a preference for similarity to CSS syntax if we can use that.


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-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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