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Re: gEDA-user: Clearing vias (Was: Last code sprint's IRC log and pictures)



On Mon, Aug 20, 2007 at 12:10:24PM +0100, Peter Clifton wrote:
> 
> Inspired by the detailing around pins on that PCB, I wounder how easy it
> would be to make PCB output like the attached glcd-clearances.png?

That's one of the things I'd like to fix.  The way PCB handles these
copper pours is to save only the outline and recompute the clearances
on each load.  Then as you add components, they're cleared incrementally.
If you move/rotate/delete/add a component, the hole is first restored
to the polygon and then removed at the new location.  For display (or
print or gerber), the polygons are "diced" -- recursively chopped into
vertical strips that have no holes.  This is done by arbitrarily picking
a hole and using the polygon intersection code to split the polygon
through the middle of that hole until a only solid shape remains.

So there are three representations of each polygon:  An outline (saved),
the current cleared polygon (in memory, used for electrical connectivity
and updated incrementally) and the diced version (transient, used for
all kinds of output).

It's the incremental updates for move/rotate/etc that really complicate
the removal of slivers or blunting of sharp points.  Especially the
sliver removal might affect the electrical connectivity of the polygon.
So you want to do that processing for the version that's used to decide
what's electrically connected.  However, if you plow a line through a
poly close to another line and then remove the sliver between them, if
you put back either line you have to figure out that the sliver needs to
come back.  Ideally without re-clearing the entire polygon from scratch
(which is slow -- that's the dominant factor in PCB startup for a board
with planes).

I might try to do point-blunting in the dicer, though.  It's less likely
that blunting a point will change the electrical connectivity of the
plane.

-- 
Ben Jackson AD7GD
<ben@xxxxxxx>
http://www.ben.com/


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