Re: gEDA-user: [iverilog] running the git source of Icarus Verilog

[Günter Dannoritzer <dannoritzer@xxxxxx>]

Stephen Williams wrote:
> Günter Dannoritzer wrote:
...
>>
>> How can I check that it works correct?
> 
> It is just as likely that you found a bug that is segfaulting instead
> of tripping an assert. That is rare in Icarus Verilog because we're
> so liberal with assertions, but it does happen from time to time.
> 

I am not sure. I think it must have to do with my setup. This is the 
output I am getting when I run the 'task automatic' example that I have 
submitted for the bug report with my git installation:

iverilog -o auto.vvp auto.v
auto.v:16: syntax error
sh: line 1: 28234 Done 
/home/hubert/dev//lib/ivl/ivlpp -L -F/tmp/ivrlg2294fdd02 
-f/tmp/ivrlg294fdd02 -p/tmp/ivrli294fdd02
      28235 Segmentation fault      | /home/hubert/dev//lib/ivl/ivl 
-C/tmp/ivrlh294fdd02 -C/home/hubert/dev//lib/ivl/vvp.conf -- -
make: *** [auto.vvp] Error 139


So with the latest development snapshot it gave me an assertion, but 
with the git version a segmentation fault.

The reason I think it has to do with my setup is that this assertion 
gave a segmentation fault with the git source and the pli example that I 
  provided with the cbValueChange bug report also caused a segmentation 
fault with the git source.

Guenter



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