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Re: gEDA-user: Layer selective DRC



On Wed, 03 Aug 2011 16:24:21 +0200
Kai-Martin Knaak <knaak@xxxxxxxxxxxxxxxxxxx> wrote:

> Hi. 
> My current project calls for big currents and and fine pitch SMD
> components, too. So I opted for four layers with 35 Âm copper on
> outer and 105 Âm copper on inner layers. Now, my fab requests 250 Âm
> clearace on layers with extra copper. To comply with this, it would
> be handy to have different sets of design rules fpor differnt layers. 
> 
> In the absence of that feature, is there any way to restrict a DRC
> check just to one specific layer?

A feature I have heard previously requested is to be able to mark
certain layers as âno-DRCâ.  For instance, to allow special trace
elements such as antennas that the DRC thinks are incorrect shorts
between two nets. I also would like this so that the âoutlineâ layer or
extra layers with my own notes, calculations, fab notes, etc., are not
considered for DRC.

Regards,
Colin


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