On Mon, 2011-08-15 at 00:06 +0200, Kai-Martin Knaak wrote: > Peter Clifton wrote: > > >> If the problem only applies to me then could You please give me some tips what to check? > > > > I can reproduce it. > > For some reason I can't. > I get silk on the far side displayed in grey as expected. > Last time I updated PCB to git was august 6th. It was broken in my repository, not git HEAD - perhaps you are using that? -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
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