Re: gEDA-user: uEDA .. was .. Re: Heavy Symbols and such

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Thursday 06 December 2007, John Doty wrote:
> It might be nice, but who knows what it is, and how to
> reasonably map   it onto our problem? Al's always selling
> Verilog. But I went and bought the book he recommended on
> Verilog-AMS, and it was mostly more sales pitch.
>
> I AM REALLY TIRED OF THE VERILOG SALES PITCH.
>
> Is there any *substance* here beyond the digital HDL?
>
> Al, *show* us something *real*. I don't necessarily mean you
> need to   write something: a pointer to something would be
> just fine (as long as it's not just more pitch). But the more
> you push what seems to be vapor, the more I'm going to ignore
> it. And I suspect I'm not the only one...

In this case, all that matters is that it can be used as a 
netlist format that is simple and regular, can represent all of 
the attributes, and has a spec that already exists.



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